In a conventional top-gate TFT process, alignment between the gate and the source/drain regions is ensured by first patterning the gate material and using it as a mask for dopant implantation and/or activation. This approach poses challenges regarding the choice of the gate metal because it needs to be either reflective to (UV) laser irradiation (e.g., Al) or compatible with thermal dopant activation at temperatures higher than 600° C. (e.g., doped polysilicon or a refractory metal such as Mo, Pd or W).
Conventional printing technologies (e.g., ink-jetting) can be advantageous for manufacturing electronic devices, due to the high throughput of printing processes relative to photolithography. However, high-resolution printing techniques are typically limited with respect to the width of a printed line (about 10 μm or larger), due to the relatively large volume of the drops.
Thus, it would be desirable to develop a process for making TFTs that can form small (e.g., <10 μm) line-width structures such as gates using printing technology, and/or that is not restricted to certain gate materials such as aluminum, refractory metals or doped polysilicon.